36 search results - page 7 / 8 » OBIG: the Architecture of an Output Buffered Switch with Inp... |
HOTI
2002
IEEE
13 years 10 months ago
2002
IEEE
High-performance input-queued switches require highspeed scheduling algorithms while maintaining good performance. Various round-robin scheduling algorithms for Virtual Output Que...
GLOBECOM
2009
IEEE
13 years 9 months ago
2009
IEEE
The Internet growth coupled with the variety of its services is creating an increasing need for multicast traffic support by backbone routers and packet switches. Recently, buffere...
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
—The LOOFA algorithm is a cell-based scheduler for CIOQ crossbar switches that can guarantee the work-conserving property in a cell-based switch if the crossbar switch works twic...
DSD
2009
IEEE
14 years 8 hour ago
2009
IEEE
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
FPGA
2011
ACM
12 years 8 months ago
2011
ACM
We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and connection and switch b...