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» On designing NUMA-aware concurrency control for scalable tra...
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HPCA
2007
IEEE
14 years 4 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
SPAA
2010
ACM
13 years 9 months ago
Simplifying concurrent algorithms by exploiting hardware transactional memory
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
PPOPP
2009
ACM
13 years 11 months ago
NePalTM: design and implementation of nested parallelism for transactional memory systems
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...
Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Ta...
POPL
2009
ACM
13 years 11 months ago
Language constructs for transactional memory
Transactional memory (TM) provides a safer, more modular, and more scalable alternative to traditional lock-based synchronization. Implementing high performance TM systems has rec...
Tim Harris
VLDB
2001
ACM
149views Database» more  VLDB 2001»
13 years 9 months ago
Cache-Conscious Concurrency Control of Main-Memory Indexes on Shared-Memory Multiprocessor Systems
Recent research addressed the importance of optimizing L2 cache utilization in the design of main memory indexes and proposed the so-called cache-conscious indexes such as the CSB...
Sang Kyun Cha, Sangyong Hwang, Kihong Kim, Keunjoo...