7 search results - page 2 / 2 » On optimality of adiabatic switching in MOS energy-recovery ... |
ICCD
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...