20 search results - page 1 / 4 » On process-algebraic verification of asynchronous circuits |
ACSD
2006
IEEE
13 years 8 months ago
2006
IEEE
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
FMICS
2008
Springer
13 years 6 months ago
2008
Springer
Different approaches have been developed to mitigate the state space explosion of model checking techniques. Among them, symbolic verification techniques use efficient representati...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
ASYNC
2007
IEEE
13 years 8 months ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
FORMATS
2006
Springer
13 years 8 months ago
2006
Springer
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...