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FMSD
2010
123views more  FMSD 2010»
13 years 3 months ago
Analog property checkers: a DDR2 case study
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
Kevin D. Jones, Victor Konrad, Dejan Nickovic
FMSD
2010
118views more  FMSD 2010»
13 years 3 months ago
On simulation-based probabilistic model checking of mixed-analog circuits
In this paper, we consider verifying properties of mixed-signal circuits, i.e., circuits for which there is an interaction between analog (continuous) and digital (discrete) values...
Edmund M. Clarke, Alexandre Donzé, Axel Leg...
SAC
2006
ACM
13 years 10 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
DAC
2006
ACM
14 years 5 months ago
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty
Existing approaches to timing analysis under uncertainty are based on restrictive assumptions. Statistical STA techniques assume that the full probabilistic distribution of parame...
Wei-Shen Wang, Vladik Kreinovich, Michael Orshansk...
KDD
2000
ACM
211views Data Mining» more  KDD 2000»
13 years 8 months ago
Mining IC test data to optimize VLSI testing
We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated...
Tony Fountain, Thomas G. Dietterich, Bill Sudyka