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FPL
2000
Springer
119views Hardware» more  FPL 2000»
13 years 8 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
ERSA
2009
147views Hardware» more  ERSA 2009»
13 years 2 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
14 years 1 months ago
Interconnect-centric Array Architectures for Minimum SRAM Access Time
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
Azeez J. Bhavnagarwala, Stephen V. Kosonocky, Jame...
CORR
2010
Springer
162views Education» more  CORR 2010»
13 years 4 months ago
Multi-standard programmable baseband modulator for next generation wireless communication
Considerable research has taken place in recent times in the area of parameterization of software defined radio (SDR) architecture. Parameterization decreases the size of the soft...
Indranil Hatai, Indrajit Chakrabarti