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» On the Input Acceptance of Transactional Memory
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CAV
2009
Springer
177views Hardware» more  CAV 2009»
14 years 6 months ago
Software Transactional Memory on Relaxed Memory Models
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
PPOPP
2009
ACM
14 years 6 months ago
Committing conflicting transactions in an STM
Dependence-aware transactional memory (DATM) is a recently proposed model for increasing concurrency of memory transactions without complicating their interface. DATM manages depe...
Hany E. Ramadan, Indrajit Roy, Maurice Herlihy, Em...
EUROSYS
2007
ACM
14 years 3 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
CCS
2008
ACM
13 years 8 months ago
Enforcing authorization policies using transactional memory introspection
Correct enforcement of authorization policies is a difficult task, especially for multi-threaded software. Even in carefully-reviewed code, unauthorized access may be possible in ...
Arnar Birgisson, Mohan Dhawan, Úlfar Erling...
ASPLOS
2011
ACM
12 years 9 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...