Sciweavers

473 search results - page 3 / 95
» On the Performance of Commit-Time-Locking Based Software Tra...
Sort
View
CODES
2011
IEEE
12 years 5 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
PPOPP
2009
ACM
14 years 6 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
OPODIS
2008
13 years 6 months ago
Ordering-Based Semantics for Software Transactional Memory
It has been widely suggested that memory transactions should behave as if they acquired and released a single global lock. Unfortunately, this behavior can be expensive to achieve...
Michael F. Spear, Luke Dalessandro, Virendra J. Ma...