Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
—A cardinal prerequisite for the system design of a sensor network, is to understand the geometric environment where sensor nodes are deployed. The global topology of a largescal...
We propose an unsupervised image segmentation method based on texton similarity and mode seeking. The input image is first convolved with a filter-bank, followed by soft cluster...
Performing random walks in networks is a fundamental primitive that has found applications in many areas of computer science, including distributed computing. In this paper, we fo...
Atish Das Sarma, Danupon Nanongkai, Gopal Panduran...
—In this paper we present an Information Theoretic Estimator for the number of sources mutually disjoint in a linear mixing model. The approach follows the Minimum Description Le...