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DATE
1997
IEEE
100views Hardware» more  DATE 1997»
13 years 8 months ago
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs
Many Built-In Self Test pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs o...
Christian Dufaza, Yervant Zorian
ITC
1996
IEEE
127views Hardware» more  ITC 1996»
13 years 8 months ago
Altering a Pseudo-Random Bit Sequence for Scan-Based BIST
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
Nur A. Touba, Edward J. McCluskey
DFT
2006
IEEE
125views VLSI» more  DFT 2006»
13 years 10 months ago
Synthesis of Efficient Linear Test Pattern Generators
This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area,...
Avijit Dutta, Nur A. Touba
FPT
2005
IEEE
170views Hardware» more  FPT 2005»
13 years 10 months ago
High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences
This paper describes a class of FPGA-specific uniform random number generators with a 2k −1 length period, which can provide k random bits per-cycle for the cost of k Lookup Ta...
David B. Thomas, Wayne Luk