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DAC
2008
ACM
14 years 5 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
13 years 11 months ago
Masking timing errors on speed-paths in logic circuits
There is a growing concern about timing errors resulting from design marginalities and the effects of circuit aging on speed-paths in logic circuits. This paper presents a low ove...
Mihir R. Choudhury, Kartik Mohanram
DAC
2004
ACM
14 years 5 months ago
Design automation for mask programmable fabrics
Programmable circuit design has played an important role in improving design productivity over the last few decades. By imposing structure on the design, efficient automation of s...
Narendra V. Shenoy, Jamil Kawa, Raul Camposano
ISQED
2006
IEEE
155views Hardware» more  ISQED 2006»
13 years 10 months ago
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
Bin Zhang, Wei-Shen Wang, Michael Orshansky
VLSID
2009
IEEE
87views VLSI» more  VLSID 2009»
14 years 5 months ago
Soft Error Rates with Inertial and Logical Masking
We analyze the neutron induced soft error rate (SER). An induced error pulse is modeled by two parameters, probability of occurrence and probability density function of the pulse ...
Fan Wang, Vishwani D. Agrawal