5 search results - page 1 / 1 » On-chip networks: A scalable, communication-centric embedded... |
DATE
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...
VLSID
2004
IEEE
14 years 4 months ago
2004
IEEE
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
INTEGRATION
2008
13 years 4 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
VLSID
2003
IEEE
14 years 4 months ago
2003
IEEE
Exploitation of silicon capacity will require improvements in design productivity and more scalable system paradigms. Asynchronous message passing networks on chip (NOC) have been...
CNSR
2005
IEEE
13 years 6 months ago
2005
IEEE
The dramatic increase in the number of mobile subscribers has put a significant resource and service provisioning strain on current cellular networks in particular in terms of mu...