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» Online cache modeling for commodity multicore processors
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2009
ACM
13 years 11 months ago
Enabling software management for multicore caches with a lightweight hardware support
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
APCSAC
2001
IEEE
13 years 8 months ago
Retargetable Cache Simulation Using High Level Processor Models
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
JSSPP
2010
Springer
13 years 2 months ago
Proposal and Evaluation of APIs for Utilizing Inter-Core Time Aggregation Scheduler
This paper proposes and evaluates APIs for Inter-Core Time Aggregation Scheduler (IAS), which is a kernel-level thread scheduler to enhance performances of multi-threaded programs ...
Satoshi Yamada, Shigeru Kusakabe
CACM
2011
125views more  CACM 2011»
12 years 11 months ago
Sora: high-performance software radio using general-purpose multi-core processors
This paper presents Sora, a fully programmable software radio platform on commodity PC architectures. Sora combines the performance and fidelity of hardware SDR platforms with th...
Kun Tan, He Liu, Jiansong Zhang, Yongguang Zhang, ...
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
13 years 11 months ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002