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» Optical proximity correction (OPC): friendly maze routing
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DAC
2004
ACM
9 years 5 months ago
Optical proximity correction (OPC): friendly maze routing
As the technology migrates into the deep submicron manufacturing (DSM) era, the critical dimension of the circuits is getting smaller than the lithographic wavelength. The unavoid...
Li-Da Huang, Martin D. F. Wong
ICCAD
2007
IEEE
143views Hardware» more  ICCAD 2007»
9 years 9 months ago
TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction
—As the 193nm lithography is likely to be used for 45nm and even 32nm processes, much more stringent requirement will be posed on Optical Proximity Correction (OPC) technologies....
Peng Yu, David Z. Pan
ASPDAC
2005
ACM
65views Hardware» more  ASPDAC 2005»
9 years 5 months ago
Multilevel full-chip gridless routing considering optical proximity correction
To handle modern routing with nanometer effects, we need to consider designs of variable wire widths and spacings, for which gridless routers are desirable due to their great fle...
Tai-Chen Chen, Yao-Wen Chang
DAC
2005
ACM
10 years 29 days ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
DAC
2008
ACM
10 years 1 months ago
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
In this paper, we present ELIAD, an efficient lithography aware detailed router to optimize silicon image after optical proximity correction (OPC) in a correct-by-construction man...
Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan
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