29 search results - page 3 / 6 » Optimal Basic Block Instruction Scheduling for Multiple-Issu... |
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...
MICRO
2006
IEEE
13 years 11 months ago
2006
IEEE
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
MICRO
1999
IEEE
13 years 9 months ago
1999
IEEE
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...