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ARVLSI
1999
IEEE
94views VLSI» more  ARVLSI 1999»
13 years 8 months ago
Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing "time borrowing," i.e., allow...
Ayoob E. Dooply, Kenneth Y. Yun
ASPDAC
1999
ACM
101views Hardware» more  ASPDAC 1999»
13 years 8 months ago
Optimal Evaluation Clocking of Self-Resetting Domino Pipelines
We describe a high performance clocking methodology for domino pipelines. Our technique maximizes the clock rate of the circular pipeline (“ring”) while maintaining the ring c...
Kenneth Y. Yun, Ayoob E. Dooply