12 search results - page 3 / 3 » Optimal Euler Circuit of Maximum Contiguous Cost |
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
SAC
2010
ACM
13 years 5 months ago
2010
ACM
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...