21 search results - page 2 / 5 » Optimal loop unrolling for GPGPU programs |
PLDI
2009
ACM
14 years 12 days ago
2009
ACM
Translation validation is a technique for checking that, after an optimization has run, the input and output of the optimization are equivalent. Traditionally, translation validat...
IEEEPACT
1999
IEEE
13 years 10 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
MICRO
2000
IEEE
13 years 5 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
PLDI
1995
ACM
13 years 9 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
CGO
2009
IEEE
14 years 13 days ago
2009
IEEE
Recent work has shown that machine learning can automate and in some cases outperform hand crafted compiler optimizations. Central to such an approach is that machine learning tec...