Sciweavers

104 search results - page 1 / 21
» Optimization of Industrial Applications with Hardware in the...
Sort
View
IROS
2006
IEEE
111views Robotics» more  IROS 2006»
13 years 10 months ago
Optimization of Industrial Applications with Hardware in the Loop
This paper deals with optimizing the task cycle time of industrial robots integrated in complex robot cells. Trajectory optimizers are usually based on models and can’t properly...
Matthieu Guilbert, Pierre-Brice Wieber, Luc D. Jol...
PLDI
2009
ACM
13 years 11 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
FPL
2003
Springer
95views Hardware» more  FPL 2003»
13 years 9 months ago
A Model for Hardware Realization of Kernel Loops
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
Jirong Liao, Weng-Fai Wong, Tulika Mitra
CASES
2003
ACM
13 years 9 months ago
Frequent loop detection using efficient non-intrusive on-chip hardware
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...
Ann Gordon-Ross, Frank Vahid
TCAD
2008
127views more  TCAD 2008»
13 years 4 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...