104 search results - page 2 / 21 » Optimization of Industrial Applications with Hardware in the... |
SC
2000
ACM
13 years 8 months ago
2000
ACM
This paper proposes a hardware mechanism for reducing coherency overhead occurring in scientific computations within DSM systems. A first phase aims at detecting, in the address s...
SBACPAD
2007
IEEE
13 years 11 months ago
2007
IEEE
The necessity of devising novel thread-level speculation (TLS) techniques has become extremely important with the growing acceptance of multi-core architectures by the industry. H...
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
ISSS
1999
IEEE
13 years 9 months ago
1999
IEEE
Portable or embedded systems allow more and more complex applications like multimedia today. These applications and submicronic technologies have made the power consumption criter...