356 search results - page 1 / 72 » Optimization of Machine Descriptions for Efficient Use |
MICRO
1996
IEEE
13 years 9 months ago
1996
IEEE
A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP)...
CC
2006
Springer
13 years 8 months ago
2006
Springer
Abstract. Writing an optimizing back end is expensive, in part because it requires mastery of both a target machine and a compiler's internals. We separate these concerns by i...
POPL
2010
ACM
14 years 2 months ago
2010
ACM
Despite years of work on retargetable compilers, creating a good, reliable back end for an optimizing compiler still entails a lot of hard work. Moreover, a critical component of ...
PLDI
1996
ACM
13 years 9 months ago
1996
ACM
High performance compilers increasingly rely on accurate modeling of the machine resources to efficiently exploit the instruction level parallelism of an application. In this pape...
JCIT
2010
12 years 11 months ago
2010
The complicated interactions among tasks lead to iterations in product design and development. To maintain the market share, enterprises should effectively manage their product de...