6 search results - page 1 / 2 » Optimization of area under a delay constraint in digital fil... |
DAC
2006
ACM
14 years 5 months ago
2006
ACM
In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowl...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
ICESS
2007
Springer
13 years 10 months ago
2007
Springer
The performance of existing adders varies widely in their speed and area requirements, which in turn sometimes makes designers pay a high cost in area especially when the delay req...
PATMOS
2007
Springer
13 years 10 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
TCAD
2008
13 years 4 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...