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ISCAPDCS
2004
13 years 6 months ago
One-Level Cache Memory Design for Scalable SMT Architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
Muhamed F. Mudawar, John R. Wani
VLDB
2002
ACM
141views Database» more  VLDB 2002»
14 years 5 months ago
Data page layouts for relational databases on deep memory hierarchies
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill
ICDE
2006
IEEE
124views Database» more  ICDE 2006»
13 years 11 months ago
Systematic Approach for Optimizing Complex Mining Tasks on Multiple Databases
It has been well recognized that data mining is an interactive and iterative process. In order to support this process, one of the long-term goals of data mining research has been...
Ruoming Jin, Gagan Agrawal
ICS
1992
Tsinghua U.
13 years 9 months ago
Optimizing for parallelism and data locality
Previous research has used program transformation to introduce parallelism and to exploit data locality. Unfortunately,these twoobjectives have usuallybeen considered independentl...
Ken Kennedy, Kathryn S. McKinley
IPPS
2008
IEEE
13 years 11 months ago
Design and optimization of a distributed, embedded speech recognition system
In this paper, we present the design and implementation of a distributed sensor network application for embedded, isolated-word, real-time speech recognition. In our system design...
Chung-Ching Shen, William Plishker, Shuvra S. Bhat...