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GECCO
2009
Springer
192views Optimization» more  GECCO 2009»
13 years 2 months ago
Improving SMT performance: an application of genetic algorithms to configure resizable caches
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
Josefa Díaz, José Ignacio Hidalgo, F...
ISHPC
2003
Springer
13 years 10 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
SC
2004
ACM
13 years 10 months ago
Optimal File-Bundle Caching Algorithms for Data-Grids
The file-bundle caching problem arises frequently in scientific applications where jobs process several files concurrently. Consider a host system in a data-grid that maintains...
Ekow J. Otoo, Doron Rotem, Alexandru Romosan
EMSOFT
2007
Springer
13 years 11 months ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer
DAC
2003
ACM
13 years 10 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis