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» Optimizing Logarithmic Arithmetic on FPGAs
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FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
13 years 11 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
ARITH
1999
IEEE
13 years 8 months ago
Montgomery Modular Exponentiation on Reconfigurable Hardware
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are...
Thomas Blum
TC
2010
12 years 11 months ago
FPGA Designs with Optimized Logarithmic Arithmetic
Using a general polynomial approximation approach, we present an arithmetic library generator for the logarithmic number system (LNS). The generator produces optimized LNS arithmet...
Haohuan Fu, Oskar Mencer, Wayne Luk
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 8 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
CHES
2008
Springer
134views Cryptology» more  CHES 2008»
13 years 6 months ago
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
Tim Güneysu, Christof Paar