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LCPC
2005
Springer
9 years 2 months ago
Optimizing Packet Accesses for a Domain Specific Language on Network Processors
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...
FPL
2006
Springer
105views Hardware» more  FPL 2006»
9 years 27 days ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
HIPEAC
2007
Springer
9 years 3 months ago
A Throughput-Driven Task Creation and Mapping for Network Processors
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-C...
EUROSYS
2007
ACM
9 years 6 months ago
Removing the memory limitations of sensor networks with flash-based virtual memory
Virtual memory has been successfully used in different domains to extend the amount of memory available to applications. We have adapted this mechanism to sensor networks, where,...
Andreas Lachenmann, Pedro José Marró...
ICALP
1998
Springer
9 years 1 months ago
Static and Dynamic Low-Congested Interval Routing Schemes
Interval Routing Schemes (IRS for short) have been extensively investigated in the past years with special emphasis on shortest paths. Besides their theoretical interest, IRS have...
Serafino Cicerone, Gabriele Di Stefano, Michele Fl...
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