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PVM
1998
Springer
13 years 9 months ago
Implementing MPI with the Memory-Based Communication Facilities on the SSS-CORE Operating System
This paper describes an e cient implementation of MPI on the Memory-Based Communication Facilities; Memory-Based FIFO is used for bu ering by the library, and Remote Write for comm...
Kenji Morimoto, Takashi Matsumoto, Kei Hiraki
PVM
2004
Springer
13 years 10 months ago
Minimizing Synchronization Overhead in the Implementation of MPI One-Sided Communication
The one-sided communication operations in MPI are intended to provide the convenience of directly accessing remote memory and the potential for higher performance than regular poin...
Rajeev Thakur, William D. Gropp, Brian R. Toonen
PC
2007
284views Management» more  PC 2007»
13 years 4 months ago
Implementation and evaluation of shared-memory communication and synchronization operations in MPICH2 using the Nemesis communic
This paper presents the implementation of MPICH2 over the Nemesis communication subsystem and the evaluation of its shared-memory performance. We describe design issues as well as...
Darius Buntinas, Guillaume Mercier, William Gropp
SOSP
1997
ACM
13 years 6 months ago
Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
Robert Stets, Sandhya Dwarkadas, Nikos Hardavellas...
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
13 years 8 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...