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» P4: A platform for FPGA implementation of protocol boosters
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FPL
1997
Springer
123views Hardware» more  FPL 1997»
12 years 1 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
HPSR
2011
105views more  HPSR 2011»
10 years 9 months ago
Implementation of ARP-path low latency bridges in Linux and OpenFlow/NetFPGA
Abstract—This paper describes the implementation of ARPPath (a.k.a. FastPath) bridges, a recently proposed concept for low latency bridges, in Linux/Soekris and OpenFlow/NetFPGA ...
Guillermo Ibáñez, Bart De Schuymer, ...
ANCS
2008
ACM
11 years 11 months ago
Implementing an OpenFlow switch on the NetFPGA platform
We describe the implementation of an OpenFlow Switch on the NetFPGA platform. OpenFlow is a way to deploy experimental or new protocols in networks that carry production traffic. ...
Jad Naous, David Erickson, G. Adam Covington, Guid...
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
12 years 3 months ago
40Gbps de-layered silicon protocol engine for TCP record
We present a de-layered protocol engine for termination of 40Gbps TCP connections using a reconfigurable FPGA silicon platform. This protocol engine is designed for a planned att...
H. Shrikumar
FCCM
2003
IEEE
185views VLSI» more  FCCM 2003»
12 years 2 months ago
Implementation of a Content-Scanning Module for an Internet Firewall
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...
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