2 search results - page 1 / 1 » PARDIS: A programmable memory controller for the DDRx interf... |
ISCA
2012
IEEE
11 years 6 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
HPCA
2007
IEEE
14 years 4 months ago
2007
IEEE
Performance gains in memory have traditionally been obtained by increasing memory bus widths and speeds. The diminishing returns of such techniques have led to the proposal of an ...