Sciweavers

15 search results - page 1 / 3
» POSE: Power Optimization and Synthesis Environment
Sort
View
DAC
1996
ACM
13 years 9 months ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
DAC
1998
ACM
13 years 9 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Architectural Optimizations for Text to Speech Synthesis in Embedded Systems
Abstract-- The increasing processing power of embedded devices have created the scope for certain applications that could previously be executed in desktop environments only, to mi...
Soumyajit Dey, Monu Kedia, Anupam Basu
ICAC
2008
IEEE
13 years 11 months ago
Power and Performance Management of Virtualized Computing Environments Via Lookahead Control
— There is growing incentive to reduce the power consumed by large-scale data centers that host online services such as banking, retail commerce, and gaming. Virtualization is a ...
Dara Kusic, Jeffrey O. Kephart, James E. Hanson, N...
ICCAD
1999
IEEE
120views Hardware» more  ICCAD 1999»
13 years 9 months ago
Design and optimization of LC oscillators
We present a method for optimizing and automating component and transistor sizing for CMOS LC oscillators. We observe that the performance measures can be formulated as posynomial...
Maria del Mar Hershenson, Ali Hajimiri, Sunderaraj...