7 search results - page 1 / 2 » Parallel Performance of Hierarchical Multipole Algorithms fo... |
HIPC
2004
Springer
13 years 9 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
IPPS
2002
IEEE
13 years 9 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
HIPC
1999
Springer
13 years 8 months ago
1999
Springer
Abstract. Recent times have seen an explosive growth in the availability of various kinds of data. It has resulted in an unprecedented opportunity to develop automated data-driven ...
IPPS
2009
IEEE
13 years 11 months ago
2009
IEEE
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
EGPGV
2011
Springer
12 years 7 months ago
2011
Springer
We present parallel algorithms for processing, extracting and rendering adaptively sampled regular terrain datasets represented as a multiresolution model defined by a super-squa...