22 search results - page 1 / 5 » Parallelization of loops with exits on pipelined architectur... |
SC
1990
ACM
13 years 9 months ago
1990
ACM
SASP
2009
IEEE
13 years 11 months ago
2009
IEEE
—Multi-cycle Instruction set extensions (ISE) can be pipelined in order to increase their throughput; however, typical program traces seldom contain consecutive calls to the same...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper explores the concept of micro-architectural loops and discusses their impact on processor pipelines. In particular, we establish the relationship between loose loops an...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
HICSS
1996
IEEE
13 years 9 months ago
1996
IEEE
To take advantage of recent architectural improvements in microprocessors, advanced compiler optimizations such as software pipelining have been developed 1, 2, 3, 4]. Unfortunate...