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» Parameterized Circuit Complexity and the W Hierarchy
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ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
13 years 9 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
FSTTCS
2010
Springer
13 years 2 months ago
The effect of girth on the kernelization complexity of Connected Dominating Set
In the Connected Dominating Set problem we are given as input a graph G and a positive integer k, and are asked if there is a set S of at most k vertices of G such that S is a dom...
Neeldhara Misra, Geevarghese Philip, Venkatesh Ram...
WSC
1998
13 years 6 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
13 years 10 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna