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» Parameterized Verification of Transactional Memories
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PLDI
2010
ACM
13 years 7 months ago
Parameterized Verification of Transactional Memories
We describe an automatic verification method to check whether transactional memories ensure strict serializability--a key property assumed of the transactional interface. Our main...
Michael Emmi, Rupak Majumdar, Roman Manevich
RV
2010
Springer
171views Hardware» more  RV 2010»
13 years 2 months ago
Runtime Verification for Software Transactional Memories
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
Vasu Singh
CAV
2004
Springer
154views Hardware» more  CAV 2004»
13 years 8 months ago
Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qa...
SPAA
2010
ACM
13 years 9 months ago
Lightweight, robust adaptivity for software transactional memory
When a program uses Software Transactional Memory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation...
Michael F. Spear
CONCUR
2008
Springer
13 years 6 months ago
Completeness and Nondeterminism in Model Checking Transactional Memories
Software transactional memory (STM) offers a disciplined concurrent programming model for exploiting the parallelism of modern processor architectures. This paper presents the firs...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh