Sciweavers

14 search results - page 1 / 3
» Parametric analysis to determine accurate interconnect extra...
Sort
View
ISQED
2009
IEEE
69views Hardware» more  ISQED 2009»
13 years 11 months ago
Parametric analysis to determine accurate interconnect extraction corners for design performance
In this paper we propose a technique to determine accurate interconnect extraction corners for a 65-nm design using parametric RC extraction and timing analysis. We calculate the ...
Ayhan A. Mutlu, Jiayong Le, Ruben Molina, Mustafa ...
DAC
1998
ACM
14 years 5 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
DATE
2008
IEEE
161views Hardware» more  DATE 2008»
13 years 10 months ago
Spatial Correlation Extraction via Random Field Simulation and Production Chip Performance Regression
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
Bao Liu
VLSI
2007
Springer
13 years 10 months ago
Parametric structure-preserving model order reduction
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
Jorge Fernandez Villena, Wil H. A. Schilders, L. M...
ISLPED
2009
ACM
110views Hardware» more  ISLPED 2009»
13 years 10 months ago
SOI, interconnect, package, and mainboard thermal characterization
This paper presents an evaluation to determine the importance of the accurate thermal characterization for several elements of a semiconductor device. Specifically, it evaluates ...
Joseph Nayfach-Battilana, Jose Renau