In this paper a new technique for partial product reduction based on the use of look-up tables for efficient processing is presented. We describe how to construct counter devices ...
The paper describes the folding method of logic functions to reduce the size of memories for keeping the functions. The folding is based on the relation of fractions of logic func...
This paper examines the energy delay implications of partial product reduction methods employed in parallel multiplier implementations. Radix 4 Modified Booth Algorithm (MBA) is c...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
Designof portablebattery operatedmultimediadevices requires energy-ecient multiplication circuits. This paper presents a novel approach to reduce power consumption of digital mul...
Abstract. We propose a static analysis framework for concurrent programs based on reduction of thread interleavings using sound invariants on the top of partial order techniques. S...