96 search results - page 3 / 20 » Partially Reconfigurable Vector Processor for Embedded Appli... |
FCCM
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGAâ€...
FPT
2005
IEEE
13 years 10 months ago
2005
IEEE
SRAM FPGAs are vulnerable to security breaches such as bitstream cloning, reverse-engineering, and tampering. Bitstream encryption and authentication are two most effective and pr...
FPL
2010
Springer
13 years 2 months ago
2010
Springer
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
FCCM
1997
IEEE
13 years 8 months ago
1997
IEEE
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...