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ICCAD
1990
IEEE
59views Hardware» more  ICCAD 1990»
13 years 9 months ago
Partitioning of Functional Models of Synchronous Digital Systems
Rajesh K. Gupta, Giovanni De Micheli
FMICS
2010
Springer
13 years 6 months ago
SMT-Based Formal Verification of a TTEthernet Synchronization Function
Abstract. TTEthernet is a communication infrastructure for mixedcriticality systems that integrates dataflow from applications with different criticality levels on a single network...
Wilfried Steiner, Bruno Dutertre
IEEEARES
2009
IEEE
14 years 5 days ago
Perfect Failure Detection in the Partitioned Synchronous Distributed System Model
—In this paper we show that it is possible to implement a perfect failure detector P (one that detects all faulty processes if and only if those processes failed) in a non-synchr...
Raimundo José de Araújo Macêdo...
FDL
2004
IEEE
13 years 9 months ago
A Functional Programming Framework of Heterogeneous Model of Computation for System Design
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 9 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann