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CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 8 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
DATE
2005
IEEE
100views Hardware» more  DATE 2005»
13 years 10 months ago
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, F...
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
13 years 8 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...