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» Peak Power Minimization Through Datapath Scheduling
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ISVLSI
2003
IEEE
93views VLSI» more  ISVLSI 2003»
13 years 9 months ago
Peak Power Minimization Through Datapath Scheduling
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
13 years 9 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
ICCD
2003
IEEE
105views Hardware» more  ICCD 2003»
14 years 1 months ago
Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling
— We model the power fluctuation as cycle-to-cycle power gradient and minimize the mean of the power gradients using ILP. We propose scheduling schemes for three modes of datapa...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
VLSID
2003
IEEE
134views VLSI» more  VLSID 2003»
14 years 4 months ago
A Framework for Energy and Transient Power Reduction during Behavioral Synthesis
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
Saraju P. Mohanty, N. Ranganathan
JISE
2008
69views more  JISE 2008»
13 years 4 months ago
Power-Management Scheduling for Peak Power Minimization
Shih-Hsu Huang, Chun-Hua Cheng