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TC
1998
9 years 11 months ago
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
Fredrik Dahlgren, Michel Dubois, Per Stenströ...
MAM
2002
151views more  MAM 2002»
9 years 11 months ago
A performance evaluation of cache injection in bus-based shared memory multiprocessors
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
Aleksandar Milenkovic, Veljko M. Milutinovic
EUROPAR
2005
Springer
10 years 5 months ago
A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
10 years 3 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
10 years 3 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
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