27 search results - page 3 / 6 » Performance Evaluation of Dynamic Speculative Multithreading... |
ISCA
2012
IEEE
11 years 8 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
SPAA
2004
ACM
13 years 11 months ago
2004
ACM
While lower supply voltage is effective for energy reduction, it suffers performance loss. To mitigate the loss, we propose to execute only the part, which does not have any influ...
HPCA
2008
IEEE
14 years 6 months ago
2008
IEEE
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
DSN
2006
IEEE
14 years 6 days ago
2006
IEEE
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
ISCA
2006
IEEE
14 years 5 days ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...