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2010
IEEE
13 years 3 months ago
Performance Evaluation of a Multicore System with Optically Connected Memory Modules
Paul Vincent Mejia, Rajeevan Amirtharajah, Matthew...
ASPDAC
2012
ACM
241views Hardware» more  ASPDAC 2012»
12 years 1 months ago
Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems
Abstract— Integrating optical interconnects into the nextgeneration multi-/many-core architecture has been considered a viable solution to addressing the limitations in throughpu...
Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amir...
DATE
2010
IEEE
130views Hardware» more  DATE 2010»
13 years 9 months ago
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming C...
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
13 years 10 months ago
Memory System Connectivity Exploration
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
ICMCS
2007
IEEE
144views Multimedia» more  ICMCS 2007»
13 years 11 months ago
A Framework for Modular Signal Processing Systems with High-Performance Requirements
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
Lukas Diduch, Ronald Müller, Gerhard Rigoll