24 search results - page 5 / 5 » Performance Prediction for Parallel Local Weather Forecast P... |
OOPSLA
2005
Springer
13 years 10 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
ICS
2003
Tsinghua U.
13 years 10 months ago
2003
Tsinghua U.
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
ICPP
2002
IEEE
13 years 10 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...