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FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
13 years 11 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....
PC
2008
142views Management» more  PC 2008»
13 years 4 months ago
Performance analysis challenges and framework for high-performance reconfigurable computing
Reconfigurable computing (RC) applications employing both microprocessors and FPGAs have potential for large speedup when compared with traditional (software) parallel application...
Seth Koehler, John Curreri, Alan D. George
AHS
2007
IEEE
273views Hardware» more  AHS 2007»
13 years 11 months ago
High-Performance Reconfigurable Computing - the View from Edinburgh
This paper reviews the current state of the art in highperformance reconfigurable computing (HPRC) from the perspective of EPCC, the high-performance computing centre at the Unive...
Robert Baxter, Stephen Booth, Mark Bull, Geoff Caw...
ERSA
2006
147views Hardware» more  ERSA 2006»
13 years 6 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko
ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
13 years 11 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles