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SIGOPS
2010
179views more  SIGOPS 2010»
12 years 12 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
12 years 8 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
OSDI
2008
ACM
14 years 5 months ago
Memory-aware Scheduling for Energy Efficiency on Multicore Processors
Memory bandwidth is a scarce resource in multicore systems. Scheduling has a dramatic impact on the delay introduced by memory contention, but also on the effectiveness of frequen...
Andreas Merkel, Frank Bellosa
ICCCN
2008
IEEE
13 years 11 months ago
Impact of Network Sharing in Multi-Core Architectures
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors—high-speed networking technologies and multi...
G. Narayanaswamy, Pavan Balaji, Wu-chun Feng
EMSOFT
2009
Springer
13 years 11 months ago
Cache-aware scheduling and analysis for multicores
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
Nan Guan, Martin Stigge, Wang Yi, Ge Yu