5 search results - page 1 / 1 » Performance of On-Chip Multiprocessors for Vision Tasks |
IPPS
2000
IEEE
13 years 8 months ago
2000
IEEE
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
EUROPAR
2010
Springer
13 years 4 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
GLVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
FPL
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a F...
ICANN
2010
Springer
13 years 5 months ago
2010
Springer
Training convolutional neural networks (CNNs) on large sets of high-resolution images is too computationally intense to be performed on commodity CPUs. Such architectures however ...