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» Performance-driven mapping for CPLD architectures
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FPGA
2001
ACM
138views FPGA» more  FPGA 2001»
13 years 9 months ago
Performance-driven mapping for CPLD architectures
Deming Chen, Jason Cong, Milos D. Ercegovac, Zhiju...
DAC
2001
ACM
14 years 5 months ago
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
Jason Cong, Michail Romesis