3 search results - page 1 / 1 » Periodic Steady-State Analysis Augmented with Design Equalit... |
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
— A design-oriented periodic steady-state analysis is presented in this paper. The new analysis finds the values of circuit parameters that result in a desired circuit performan...
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
JSS
2008
13 years 3 months ago
2008
This report presents a model-driven, stress test methodology aimed at increasing chances of discovering faults related to network traffic in Distributed Real-Time Systems (DRTS). T...