9 search results - page 1 / 2 » Physical Planning Of On-Chip Interconnect Architectures |
ICCD
2002
IEEE
14 years 2 months ago
2002
IEEE
Interconnect architecture plays an important role in determining the throughput of meshed communication structures. We assume a mesh structure with uniform communication demand fo...
ASAP
2003
IEEE
13 years 10 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
ICCD
2006
IEEE
14 years 2 months ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
SLIP
2006
ACM
13 years 11 months ago
2006
ACM
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...